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Electrical properties of InP/InGaAs pnp heterostructure--emitter bipolar transistor

Tsai Jung-Hui¹, Liu Wen-Chau², Guo Der-Feng³, Kang Yu-Chi¹, Chiu Shao-Yen⁴, Lour Wen-Shiung⁴

¹Department of Electronic Engineering, National Kaohsiung Normal University, 116 Ho-ping 1 st Road, Kaohsiung 802, Taiwan
²Institude of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, 1 University Road, Tainan, Taiwan
³Department of Electronic Engineering, Air Force Academy, Kaohsiung, Taiwan
⁴Department of Electrical Engineering, National Taiwan Ocean University, 2 Peining Road, Keelung, Taiwan

Поступила в редакцию: 20 июня 2007 г.

Выставление онлайн: 18 февраля 2008 г.

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The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor have been investigated by theoretical analysis and experimental results. Though the valence band discontinuity at InP/InGaAs heterojunction is relatively large, the addition of a heavy-doped as well as thin p⁺-InGaAs emitter layer between p-InP confinement and n⁺-InGaAs base layers effectively eliminates the potential spike at emitter-base junction, lowers the emitter-collector offset voltage, and increases the potential barrier for electrons, simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved. PACS: 85.30.Pq, 73.40.Kp

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