Вышедшие номера
Surface Potential Modeling of DG SOI MoS2 FET (MFET) and Gate Misalignment Effect Analysis Therein
Dwivedi A.K.1,2, Baliyan T.1,2, Tripathi S.1,2
1Department of Electronics &
2Communication Engineering, Motilal Nehru National Institute of Technology, Allahabad, Prayagra, India
Email: shtri@mnnit.ac.in
Поступила в редакцию: 12 мая 2020 г.
Выставление онлайн: 9 июня 2021 г.

This paper presents surface potential model for short-channel double-gate (DG) silicon-on-insulator (SOI) MoS2 field-effect transistors (FET) - DG-MFET. The parabolic approximation technique is utilized to solve the 2D Poisson.s equation analytically under appropriate boundary conditions to acquire the expression for surface potential. The channel potential characteristics have been examined as a function of various device parameters such as gate length, gate oxide thickness, gate oxide materials, and channel thickness. The analytical model results and numerical simulation data are observed to be in good matching, which confirms our proposed model for the DG-MFET. Like DG-MOSFETs, DG-MFETs may have issue of concerns inherited due to their structure. One such concern is alignment of top and bottom gate since it has direct impact on the device behavior. Keeping this fact in view, rigorous simulation-based study have been carried out to analyze the gate misalignment effects on device performance parameters like surface potential, threshold voltage, sub-threshold slope, drain-induced barrier lowering, drain current, transconductance, and channel conductance. Both source- and drain-side misalignments have been considered while performing the simulations. Keywords: DG SOI MoS2 FET, DG-MFET, misalignment, surface potential.

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