Вышедшие номера
Device Performance Optimization of Organic Thin-Film Transistors at Short-Channel Lengths Using Vertical Channel Engineering Techniques
Полная версия: 10.1134/S1063782621010024
Ana F.1, Din N.2
1Department of Electronics and Communication Engineering, School of Engineering & Technology, Baba Ghulam Shah Badshah University, Rajouri, Jammu & Kashmir, India
2Department of Electronics and Communication Engineering, National Institute of Technology, Srinagar,, India
Email: anashah@bgsbu.ac.in
Поступила в редакцию: 16 августа 2020 г.
Выставление онлайн: 12 октября 2020 г.

This paper presents a finite-element-based two-dimensional numerical simulation study of the vertical channel engineering approaches for controlling the short-channel effects (SCEs) in organic transistors based on thin-film transistor technology (OTFTs). The impact of gate-oxide thickness TOx scaling and usage of high-permittivity gate dielectric material has been analyzed for a bottom-contact organic thin-film transistors at channel length of 0.7 μm. The techniques have been used to investigate the impact on drain-induced barrier lowering (DIBL), sub-threshold slope, and IOn/IOff ratio. The results have shown a significant reduction in values of DIBL and sub-threshold slope in short-channel OTFTs when either of the channel engineering techniques are employed. A high IOn/IOff ratio of the order of ~107 has been achieved using a high-permittivity gate-oxide material. It has been observed that using a high-permittivity gate dielectric material, apeak value of IOn/IOff ratio can be achieved for an equivalent oxide thickness of 5 nm. The results suggest that the desirable transistor performance can be achieved through proper selection of gate-oxide material and thickness. Keywords: DIBL, high-kappa gate dielectric, leakage currents, sub-threshold.

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